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regarding the change of names mentioned in the document, such as hitachi electric and hitachi xx, to renesas technology corp. the semiconductor operations of mitsubishi electric and hitachi were transferred to renesas technology corporation on april 1st 2003. these operations include microcomputer, logic, analog and discrete devices, and memory chips other than drams (flash memory, srams etc.) accordingly, although hitachi, hitachi, ltd., hitachi semiconductors, and other hitachi brand names are mentioned in the document, these names have in fact all been changed to renesas technology corp. thank you for your understanding. except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. renesas technology home page: http://www.renesas.com renesas technology corp. customer support dept. april 1, 2003 to all our customers
cautions keep safety first in your circuit designs! 1. renesas technology corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corporation product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas technology corporation or a third party. 2. renesas technology corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by renesas technology corporation without notice due to product improvements or other reasons. it is therefore recommended that customers contact renesas technology corporation or an authorized renesas technology corporation product distributor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by renesas technology corporation by various means, including the renesas technology corporation semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. please contact renesas technology corporation or an authorized renesas technology corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corporation is necessary to reprint or reproduce in whole or in part these materials. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a license from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. 8. please contact renesas technology corporation for further details on these materials or the products contained therein.
hm62v16256ci series wide temperature range version 4 m sram (256-kword 16-bit) ade-203-1230c (z) rev. 3.0 jul. 23, 2001 description the hitachi hm62v16256ci series is 4-mbit static ram organized 262,144-word 16-bit. hm62v16256ci series has realized higher density, higher performance and low power consumption by employing cmos process technology (6-transistor memory cell). it offers low power standby power dissipation; therefore, it is suitable for battery backup systems. it is packaged in standard 44-pin plastic tsopii. features ? single 2.5 v and 3.0 v supply: 2.2 v to 3.6 v ? fast access time: 70 ns (max) ? power dissipation: ? active: 5.0 mw/mhz (typ)(v cc = 2.5 v) : 6.0 mw/mhz (typ) (v cc = 3.0 v) ? standby: 2 m w (typ) (v cc = 2.5 v) : 2.4 m w (typ) (v cc = 3.0 v) ? completely static memory. ? no clock or timing strobe required ? equal access and cycle times ? common data input and output. ? three state output ? battery backup operation. ? 2 chip selection for battery backup ? temperature range: ?0 to +85 c
hm62v16256ci series 2 ordering information type no. access time package HM62V16256CLTTI-7 70 ns 400-mil 44-pin plastic tsopii (normal-bend type) (ttp-44db)
hm62v16256ci series 3 pin arrangement 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 a4 a3 a2 a1 a0 cs1 i/o0 i/o1 i/o2 i/o3 v v i/o4 i/o5 i/o6 i/o7 we a17 a16 a15 a14 a13 cc ss a5 a6 a7 oe ub lb i/o15 i/o14 i/o13 i/o12 v v i/o11 i/o10 i/o9 i/o8 cs2 a8 a9 a10 a11 a12 cc ss (top view) 44-pin tsop pin description pin name function a0 to a17 address input i/o0 to i/o15 data input/output cs1 chip select 1 cs2 chip select 2 we write enable oe output enable lb lower byte select ub upper byte select v cc power supply v ss ground
hm62v16256ci series 4 block diagram i/o0 i/o15 cs2 we oe a4 a3 a2 a5 a0 v v cc ss row decoder memory matrix 2,048 x 2,048 column i/o column decoder input data control control logic a6 a12 a11 a10 a9 a8 a13 a14 a15 a16 a17 a7 cs1 lb ub a1 lsb msb lsb msb
hm62v16256ci series 5 operation table cs1 cs2 we oe ub lb i/o0 to i/o7 i/o8 to i/o15 operation h high-z high-z standby l high-z high-z standby h h high-z high-z standby l h h l l l dout dout read l h h l h l dout high-z lower byte read l h h l l h high-z dout upper byte read lhl l l din din write lhl h l din high-z lower byte write lhl l h high-z din upper byte write lhhh high-z high-z output disable note: h: v ih , l: v il , : v ih or v il absolute maximum ratings parameter symbol value unit power supply voltage relative to v ss v cc ?.5 to + 4.6 v terminal voltage on any pin relative to v ss v t ?.5* 1 to v cc + 0.3* 2 v power dissipation p t 1.0 w storage temperature range tstg ?5 to +125 c storage temperature range under bias tbias ?0 to +85 c notes: 1. v t min: ?.0 v for pulse half-width 30 ns. 2. maximum voltage is +4.6 v. dc operating conditions parameter symbol min typ max unit note supply voltage v cc 2.2 2.5/3.0 3.6 v v ss 000v input high voltage v cc = 2.2 v to 2.7 v v ih 2.0 v cc + 0.3 v v cc = 2.7 v to 3.6 v v ih 2.2 v cc + 0.3 v input low voltage v cc = 2.2 v to 2.7 v v il ?.2 0.4 v 1 v cc = 2.7 v to 3.6 v v il ?.3 0.6 v 1 ambient temperature range ta ?0 85 c note: 1. v il min: ?.0 v for pulse half-width 30 ns.
hm62v16256ci series 6 dc characteristics parameter symbol min typ * 1 max unit test conditions input leakage current |i li | 1 m a vin = v ss to v cc output leakage current |i lo | 1 m a cs1 = v ih or cs2 = v il or oe = v ih or we = v il or l b = ub = v ih , v i/o = v ss to v cc operating current i cc 5 20 ma cs1 = v il , cs2 = v ih , others = v ih /v il , i i/o = 0 ma average operating current i cc1 7 25 ma min. cycle, duty = 100%, i i/o = 0 ma, cs1 = v il , cs2 = v ih , others = v ih /v il i cc2 2 5 ma cycle time = 1 m s, duty = 100%, i i/o = 0 ma, cs1 0.2 v, cs2 3 v cc ?0.2 v v ih 3 v cc ?0.2 v, v il 0.2 v standby current i sb 0.1 0.3 ma cs2 = v il standby current i sb1 * 2 0.8 20 m a 0 v vin (1) 0 v cs2 0.2 v or (2) cs1 3 v cc ?0.2 v, cs2 3 v cc ?0.2 v or (3) lb = ub 3 v cc ?0.2 v cs2 3 v cc ?0.2 v cs1 0.2 v output high voltage v cc =2.2 v to 2.7 v v oh 2.0 v i oh = ?.5 ma v cc =2.7 v to 3.6 v v oh 2.4 v i oh = ? ma v cc =2.2 v to 3.6 v v oh v cc ?0.2 v i oh = ?00 m a output low voltage v cc =2.2 v to 2.7 v v ol 0.4 v i ol = 0.5 ma v cc =2.7 v to 3.6 v v ol 0.4 v i ol = 2 ma v cc =2.2 v to 3.6 v v ol 0.2 v i ol = 100 m a notes: 1. typical values are at v cc = 2.5 v/3.0 v, ta = +25 c and not guaranteed. 2. this characteristic is guaranteed only for l-version. capacitance (ta = +25 c, f = 1.0 mhz) parameter symbol min typ max unit test conditions note input capacitance cin 8 pf vin = 0 v 1 input/output capacitance c i/o 10 pf v i/o = 0 v 1 note: 1. this parameter is sampled and not 100% tested.
hm62v16256ci series 7 ac characteristics (ta = ?0 to +85 c, v cc = 2.2 v to 3.6 v, unless otherwise noted.) test conditions ? input pulse levels: v il = 0.4 v, v ih = 2.2 v (v cc = 2.2 v to 2.7 v) : v il = 0.4 v, v ih = 2.4 v (v cc = 2.7 v to 3.6 v) ? input rise and fall time: 5 ns ? input/output timing reference levels: 1.1 v (v cc = 2.2 v to 2.7 v) : 1.4 v (v cc = 2.7 v to 3.6 v) ? output load: see figures (including scope and jig) dout 30pf r1 v tm v tm = 2.3 v r2 r1 = 3070 w r2 = 3150 w 50pf dout rl=500 w 1.4 v output load (a) (v cc = 2.2 v to 2.7 v) output load (b) (v cc = 2.7 v to 3.6 v)
hm62v16256ci series 8 read cycle hm62v16256ci -7 parameter symbol min max unit notes read cycle time t rc 70 ns address access time t aa ?0ns chip select access time t acs1 ?0ns t acs2 ?0ns output enable to output valid t oe ?0ns output hold from address change t oh 10 ns lb , ub access time t ba ?0ns chip select to output in low-z t clz1 10 ns 2, 3 t clz2 10 ns 2, 3 lb , ub enable to low-z t blz 5 ns 2, 3 output enable to output in low-z t olz 5 ns 2, 3 chip deselect to output in high-z t chz1 0 25 ns 1, 2, 3 t chz2 0 25 ns 1, 2, 3 lb , ub disable to high-z t bhz 0 25 ns 1, 2, 3 output disable to output in high-z t ohz 0 25 ns 1, 2, 3
hm62v16256ci series 9 write cycle hm62v16256ci -7 parameter symbol min max unit notes write cycle time t wc 70 ns address valid to end of write t aw 60 ns chip selection to end of write t cw 60 ns 5 write pulse width t wp 50 ns 4 lb , ub valid to end of write t bw 55 ns address setup time t as 0 ns 6 write recovery time t wr 0 ns 7 data to write time overlap t dw 30 ns data hold from write time t dh 0ns output active from end of write t ow 5 ns 2 output disable to output in high-z t ohz 0 25 ns 1, 2 write to output in high-z t whz 0 25 ns 1, 2 notes: 1. t chz , t ohz , t whz and t bhz are defined as the time at which the outputs achieve the open circuit conditions and are not referred to output voltage levels. 2. this parameter is sampled and not 100% tested. 3. at any given temperature and voltage condition, t hz max is less than t lz min both for a given device and from device to device. 4. a write occures during the overlap of a low cs1 , a high cs2, a low we and a low lb or a low ub . a write begins at the latest transition among cs1 going low, cs2 going high, we going low and lb going low or ub going low. a write ends at the earliest transition among cs1 going high, cs2 going low, we going high and lb going high or ub going high. t wp is measured from the beginning of write to the end of write. 5. t cw is measured from the later of cs1 going low or cs2 going high to the end of write. 6. t as is measured from the address valid to the beginning of write. 7. t wr is measured from the earliest of cs1 or we going high or cs2 going low to the end of write cycle.
hm62v16256ci series 10 timing waveform read cycle t aa t acs1 t acs2 t clz2 t clz1 t blz t ba t oh t rc valid data address dout valid address high impedance cs1 cs2 lb , ub oe * 1, 2, 3 * 1, 2, 3 * 2, 3 * 2, 3 * 2, 3 * 1, 2, 3 t olz * 2, 3 * 1, 2, 3 t oe t chz1 t chz2 t bhz t ohz
hm62v16256ci series 11 write cycle (1) ( we clock) address we t wc t aw t wp * 4 t wr * 7 t cw * 5 t cw * 5 t bw t as * 6 t ow * 2 t whz * 1, 2 t dw t dh valid address valid data cs1 lb , ub dout din high impedance cs2
hm62v16256ci series 12 write cycle (2) ( cs clock, oe = v ih ) address we t wc t aw t wp * 4 t wr * 7 t cw * 5 t cw * 5 t bw t as * 6 t dw t dh valid address valid data lb , ub dout din high impedance cs2 cs1
hm62v16256ci series 13 write cycle (3) ( lb , ub clock, oe = v ih ) address we t wc t aw t wp * 4 t cw * 5 t cw * 5 t bw t wr * 7 t dw t dh valid address valid data lb , ub dout din high impedance cs2 cs1 t as * 6
hm62v16256ci series 14 low v cc data retention characteristics (ta = ?0 to +85 c) parameter symbol min typ * 3 max unit test conditions * 2 v cc for data retention v dr 2.0 3.6 v vin 3 0v (1) 0 v cs2 0.2 v or (2) cs2 3 v cc ?0.2 v, cs1 3 v cc ?0.2 v or (3) lb = ub 3 v cc ?0.2 v, cs2 3 v cc ?0.2 v, cs1 0.2 v data retention current i ccdr * 1 0.8 20 m av cc = 3.0 v, vin 3 0v (1) 0 v cs2 0.2 v or (2) cs2 3 v cc ?0.2 v, cs1 3 v cc ?0.2 v or (3) lb = ub 3 v cc ?0.2 v, cs2 3 v cc ?0.2 v, cs1 0.2 v chip deselect to data retention time t cdr 0 ns see retention waveform operation recovery time t r t rc * 4 ns notes: 1. this characteristic is guaranteed only for l-version, 10 m a max. at ta = ?0 to +40 c. 2. cs2 controls address buffer, we buffer, cs1 buffer, oe buffer, lb , ub buffer and din buffer. if cs2 controls data retention mode, vin levels (address, we , oe , cs1 , lb , ub , i/o) can be in the high impedance state. if cs1 controls data retention mode, cs2 must be cs2 3 v cc ?0.2 v or 0 v cs2 0.2 v. the other input levels (address, we , oe , lb , ub , i/o) can be in the high impedance state. 3. typical values are at v cc = 3.0 v, ta = +25?c and not guaranteed. 4. t rc = read cycle time.
hm62v16256ci series 15 low v cc data retention timing waveform (1) ( cs1 controlled) ( v cc = 2.2 v to 2.7 v) cc v 2.2 v 2.0 v 0 v cs1 t cdr t r cs1 v e 0.2 v cc 3 dr v data retention mode low v cc data retention timing waveform (2) ( cs1 controlled) ( v cc = 2.7 v to 3.6 v) cc v 2.2 v 2.7 v 0 v cs t cdr t r cs v e 0.2 v cc 3 dr v data retention mode low v cc data retention timing waveform (3) (cs2 controlled) ( v cc = 2.2 v to 2.7 v) cc v 2.2 v 0.4 v 0 v cs2 cdr t r 0 v cs2 0.2 v dr v data retention mode t < <
hm62v16256ci series 16 low v cc data retention timing waveform (4) (cs2 controlled) ( v cc = 2.7 v to 3.6 v) cc v 2.7 v 0.6 v 0 v cs2 cdr t r 0 v cs2 0.2 v dr v data retention mode t < < low v cc data retention timing waveform (5) ( lb , ub controlled) ( v cc = 2.2 v to 2.7 v) cc v 2.2 v 2.0 v 0 v lb , ub t cdr t r lb , ub v e 0.2 v cc 3 dr v data retention mode low v cc data retention timing waveform (6) ( lb , ub controlled) ( v cc = 2.7 v to 3.6 v) cc v 2.2 v 2.7 v 0 v lb , ub t cdr t r lb , ub v e 0.2 v cc 3 dr v data retention mode
hm62v16256ci series 17 package dimensions hm62v16256cltti series (ttp-44db) hitachi code jedec eiaj mass (reference value) ttp-44db 0.43 g *dimension including the plating thickness base material dimension 0.13 m 0.10 0.80 44 23 122 18.41 18.81 max *0.30 0.10 1.20 max 10.16 *0.17 0.05 0.13 0.05 11.76 0.20 0.50 0.10 0 e 5 1.005 max 0.80 0.25 0.05 0.125 0.04 as of january, 2001 unit: mm
hm62v16256ci series 18 cautions 1. hitachi neither warrants nor grants licenses of any rights of hitachi? or any third party? patent, copyright, trademark, or other intellectual property rights for information contained in this document. hitachi bears no responsibility for problems that may arise with third party? rights, including intellectual property rights, in connection with use of the information contained in this document. 2. products and product specifications may be subject to change without notice. confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. hitachi makes every attempt to ensure that its products are of high quality and reliability. however, contact hitachi? sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. design your application so that the product is used within the ranges guaranteed by hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the hitachi product. 5. this product is not designed to be radiation resistant. 6. no one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from hitachi. 7. contact hitachi? sales office for any questions regarding this document or hitachi semiconductor products. hitachi, ltd. semiconductor & integrated circuits nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan tel: (03) 3270-2111 fax: (03) 3270-5109 copyright ?hitachi, ltd., 2001. all rights reserved. printed in japan. hitachi asia ltd. hitachi tower 16 collyer quay #20-00 singapore 049318 tel : <65>-538-6533/538-8577 fax : <65>-538-6933/538-3877 url : http://semiconductor.hitachi.com.sg url http://www.hitachisemiconductor.com/ hitachi asia ltd. (taipei branch office) 4/f, no. 167, tun hwa north road hung-kuo building taipei (105), taiwan tel : <886>-(2)-2718-3666 fax : <886>-(2)-2718-8180 telex : 23222 has-tp url : http://www.hitachi.com.tw hitachi asia (hong kong) ltd. group iii (electronic components) 7/f., north tower world finance centre, harbour city, canton road tsim sha tsui, kowloon hong kong tel : <852>-(2)-735-9218 fax : <852>-(2)-730-0281 url : http://semiconductor.hitachi.com.hk hitachi europe gmbh electronic components group dornacher stra? 3 d-85622 feldkirchen postfach 201,d-85619 feldkirchen germany tel: <49> (89) 9 9180-0 fax: <49> (89) 9 29 30 00 hitachi europe ltd. electronic components group whitebrook park lower cookham road maidenhead berkshire sl6 8ya, united kingdom tel: <44> (1628) 585000 fax: <44> (1628) 585200 hitachi semiconductor (america) inc. 179 east tasman drive san jose,ca 95134 tel: <1> (408) 433-1990 fax: <1>(408) 433-0223 for further information write to: colophon 5.0

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